AccelChip Inc. Enhances Interoperability by Joining the Mentor Graphics OpenDoor Program
SANTA CLARA, Calif.—(BUSINESS WIRE)—Sept. 27, 2004—
AccelChip Inc., the industry's only provider of
automated flows from MATLAB(R) algorithms to silicon, has joined the
OpenDoor program from Mentor Graphics (Nasdaq:MENT) to enhance
interoperability between the two companies' respective products.
The AccelChip(R) DSP Synthesis tool and AccelWare(R) Intellectual
Property bridge the gap between algorithm development and silicon
implementation by generating synthesizable VHDL or Verilog and
testbenches from MATLAB algorithms. Designed to fit into current
design flows, AccelChip DSP Synthesis now provides an integrated
verification and implementation flow with the latest versions of
Mentor Graphics(R) Precision(R) RTL, Leonardo(R) Spectrum, and
ModelSim(R) synthesis and simulation tools.
"With today's complex design, companies are looking for superior
point solutions that, when combined, form a complete flow. Mentor
Graphics provides leading solutions for ASIC and FPGA design," said
Tom Feist, vice president of Sales and Marketing, AccelChip. "With
their tools now integrated into the AccelChip DSP Synthesis
environment, our mutual customers now have a complete DSP design
automation solution."
"When EDA vendors work together, the users reap the benefits. The
OpenDoor program demonstrates our commitment to serve the designer
community via enhanced interoperability in the integrated systems
design, hardware/software co-design, NT-based design and multiplatform
environments," said Juergen Jaeger, marketing director, Design
Creation and Synthesis Division, Mentor Graphics. "Strong partner
solutions maximize productivity, expand choices and shorten time to
market, all of which become increasingly critical factors for success
in complex FPGA design. The combination of AccelChip's DSP front-end
with our leading FPGA solutions provides a truly comprehensive design
environment."
About AccelChip DSP Synthesis
The AccelChip DSP Synthesis tool takes DSP algorithms written as
MATLAB M-files and generates synthesizable RTL and testbenches for
implementation in FPGAs, ASICs, and structured ASICs. AccelChip allows
the designer to keep the M-file as a single design source and driver
for design exploration and verification.
About the Companies
Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in
electronic hardware and software design solutions, providing products,
consulting services and award-winning support for the world's most
successful electronics and semiconductor companies. Established in
1981, the company reported revenues over the last 12 months of about
$600 million and employs approximately 3,800 people worldwide.
Corporate headquarters are located at 8005 S.W. Boeckman Road,
Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are
located at 1001 Ridder Park Drive, San Jose, California 95131-2314.
World Wide Web site: www.mentor.com.
AccelChip Inc. develops and markets a MATLAB-based algorithmic
synthesis environment and intellectual property that automate the
development and implementation of DSP designs. The company's unique
DSP Design Automation (DDA) solutions reduce design iterations,
accelerate the creation and verification of register-transfer language
(RTL), and link the domain-specific DSP design environment with
industry-standard hardware design flows targeting FPGAs, ASICs, and
structured ASICs. Founded in 2000, AccelChip is located in Milpitas,
California, and has design centers in Portland, Oregon, and Carlsbad,
California. AccelChip's Web address is www.accelchip.com.
AccelChip and AccelWare are registered trademarks of AccelChip
Inc. All other trade names referenced are the service marks,
trademarks, or registered trademarks of their respective companies.
Contact:
AccelChip Inc.
Jayne Scheckla, 971-204-0150, X240 (Media Contact)
jayne.scheckla@accelchip.com
